The Electrical Engineering and Computer Science Department at the University of Tennessee is a participant in Cadence Design Systems' university program which is designed to facilitate the use of Cadence Design Systems tools by undergraduate and graduate students in engineering courses and in academic research. This page contains only information about Cadence products currently in use by the academic programs of the University.
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Undergraduate students in this course use the Custom Integrated Circuits Bundle to develop circuit design methodologies, including simulation and physical layout of CMOS digital circuit structures.
Graduate students in this course use the Custom Integrated Circuits bundle to aid in VLSI design, circuit capture, circuit simulation, and layout of custom integrated circuits.
Students in this graduate course use the Custom Integrated Circuits Bundle to enter designs as a schematic using Composer and simulate using Verilog-XL and/or Spectre. They then use Virtuoso to perform the layout, followed by DRC and extraction for post-layout simulation. The resulting designs are submitted to MOSIS for fabrication and subsequent testing.
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