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Cadence University Program Member

The Electrical Engineering and Computer Science Department at the University of Tennessee is a participant in Cadence Design Systems’ university program which is designed to facilitate the use of Cadence Design Systems tools by undergraduate and graduate students in engineering courses and in academic research. This page contains only information about Cadence products currently in use by the academic programs of the University.

Faculty Contact:
Dr. Ben Blalock
Phone:  (865) 974-0927
System Administrative Contact:
William Rhodes
Phone:  (865) 974-9199

Updated 05/13/2015

Curriculum Using Cadence Design Systems Software:

ECE 433

Undergraduate students in this course use the Custom Integrated Circuits Bundle to develop circuit design methodologies, including simulation and physical layout of CMOS digital circuit structures.

ECE 533

Graduate students in this course use the Custom Integrated Circuits bundle to aid in VLSI design, circuit capture, circuit simulation, and layout of custom integrated circuits.

ECE 651

Students in this graduate course use the Custom Integrated Circuits Bundle to enter designs as a schematic using Composer and simulate using Verilog-XL and/or Spectre. They then use Virtuoso to perform the layout, followed by DRC and extraction for post-layout simulation. The resulting designs are submitted to MOSIS for fabrication and subsequent testing.

Research Projects Using Cadence Design Systems Software

The Analog, VLSI and Devices Laboratory as well as the Integrated Circuits & Systems Laboratory also make extensive use of Cadence products in their research.


Information is provided “as is” without warranty of any kind. No statement is made and no attempt has been made to examine the information, either with respect to operability, origin, authorship, or otherwise. Please use this information at your own risk. We recommend using it on a copy of your data to be sure you understand what it does under your conditions.


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