Cadence University Program Member

The Electrical Engineering and Computer Science Department at the University of Tennessee is a participant in Cadence Design Systems' university program which is designed to facilitate the use of Cadence Design Systems tools by undergraduate and graduate students in engineering courses and in academic research. This page contains only information about Cadence products currently in use by the academic programs of the University.

Faculty Contact
Dr. Don Bouldin
Tel: (865) 974-5444
E-mail: dbouldin@utk.edu

System Administration Contact
William Rhodes
Tel: (865) 974-9199
E-mail: wrhodes@utk.edu

AMI-0.6 Standard-Cell Library for Cadence

AMI-0.6 SmartFrame for Cadence

ECE 433 Undergraduate students in this course use the Custom Integrated Circuits Bundle to develop circuit design methodologies, including simulation and physical layout of CMOS digital circuit structures.

ECE 533 Graduate students in this course use the Custom Integrated Circuits bundle to aid in VLSI design, circuit capture, circuit simulation, and layout of custom integrated circuits.

ECE 552 Students in this graduate course use the System Level Design Bundle to enter designs using SPW (Signal Processing Workbench). They also use the Deep Submicron Design Bundle to perform automatic place and route of standard cells using Silicon Ensemble.

ECE 599 Students in this graduate course use the Design and Verification Bundle to enter simulate VHDL and Verilog designs using the NC Simulator.

ECE 651 Students in this graduate course use the Custom Integrated Circuits Bundle to enter designs as a schematic using Composer and simulate using Verilog-XL and/or Spectre. They then use Virtuoso to perform the layout, followed by DRC and extraction for post-layout simulation. The resulting designs are submitted to MOSIS for fabrication and subsequent testing.

ECE 652 Students in this graduate course use the Deep Submicron Design Bundle to perform automatic place and route of standard cells using Silicon Ensemble. They also use the PCB Systems Bundle to perform place and route of printed wiring boards or MCMs.

Datapath-Driven IC Design Silicon Ensemble is used to perform placement and routing of TMSC standard cells. For additional information, click here.

The Analog, VLSI and Devices Laboratory as well as the Integrated Circuits & Systems Laboratory also make extensive use of Cadence products in their research.

A patched version of ncsu-cdk-1.5.1 is available for use on the linux hosts. In order to use these files with Cadence certain setting must be configured. You will need to copy the following files to a given work directory. MYWORKDIR should be replaced with the name you wish to use for your working directory.

mkdir MYWORKDIR
cd MYWORKDIR
cp /usr/local/ncsu/ncsu-cdk-1.5.1/cdssetup/cdsinit .cdsinit
cp /usr/local/ncsu/ncsu-cdk-1.5.1/cdssetup/cdsenv .cdsenv
cp /usr/local/ncsu/ncsu-cdk-1.5.1/cdssetup/cds.lib cds.lib
cp /usr/local/ncsu/ncsu-cdk-1.5.1/bin/startcad startcad
source startcad

The file startcad contains all the scripting necessary to setup the cadence environment and launch cadence using the patched version of the NCSU PDK.

• http://analog.ece.utk.edu/Cadence/Introduction.htm
• http://www.ece.utk.edu/~bouldin/courses/651/homework_2.html
• Old Tutorials and Lab Exercises

• Cadence University Program
• US Universities Using Cadence
• Cadence Newsletters

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